Senior Staff Silicon Design Engineer

Overview

The focus of this role is to plan, build, and execute the design of new and existing features for AMD’s IP (involving System reset and boot, clocking, advanced power management as well as some sub-IP controllers), resulting in no bugs in the final design. It is a must that the candidate has one or more of the following experience / knowledge, such as X86 / ARM architecture, AMBA(AXI / AHB / APB) bus, USB(4.0 / 3.0 / 2.0 / 1.1; HSIC / host / device / OTG) system, NAND Flash host controller / BCH / double-data-rate interface, PCI-E / PCI bus, low power design, clock generation and control, SD / eMMC host controller, SATA / SAS, Legacy IPs (SPI / SMBUS / ACPI / eSPI / GPIO), General connectivity IPs (I2C / I3C / UART), Ethernet, JTAG, SoC IP integration, etc.

Responsibilities

• Understand the ASIC design / verification flow to deliver high quality IP to SoCs and meet power, area, timing, schedule bounding box, and other metrics
• Work with team members and apply design techniques to different phases of complex logic design for ASIC / SOC projects, including specification, microarchitecture definition, top-level SOC design tasks, HDL coding, simulation debugging, timing, and silicon debugging

Qualifications

Academic Credentials

Location

Penang, Malaysia

Application questions

Your application will include the following questions :

We care deeply about transforming lives with AMD technology to enrich our industry, our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. This is who we are at our best. One company. One Team.

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