Senior PCIE Validation Engineer

Job Overview

Post Si PCIE Debug is a Post‑Silicon Validation Engineer role focused on PCIe hardware debugging. The engineer works with finalized silicon chips, using debug tools and methodologies to troubleshoot and resolve issues in PCIe controllers and associated systems.

Key aspects include working with silicon chips after manufacturing, testing functionality and finding bugs. The primary focus is on the PCI Express interface, a high‑speed serial expansion bus standard used in many computer components, including link training, data transfer, power management such as ASPM, and hot‑plugging.

Key Responsibilities

• Develop and execute test plans for PCIe features.
• Use debug tools such as logic analyzers and oscilloscopes to capture and analyze PCIe traffic.
• Root‑cause issues, tracing problems back to their origin in the hardware design.
• Collaborate with design and firmware teams to resolve issues.
• Ensure PCIe compliance with industry standards.

Qualifications

#J-18808-Ljbffr