Senior Staff Engineer Analog Layout

In your new role you will :

• Participate in block / IP / chip floor planning from scratch, performing routing & layout verification (such as LVS, DRC, Antenna & others) and troubleshooting the results
• Co-lead / lead the physical layout of IP / full chip design by working closely with cross functional team leader
• Conduct thorough layout design reviews internally & external review with circuit designers
• Extensive use of CAD tools (Cadence Virtuoso VXL & Mentor Calibre) in IP / chip integration and verification
• Capable in guiding / coaching junior engineers for on time delivery & quality

Your Profile

You are best equipped for this task if you have :

• Bachelor’s Degree in Electrical / Electronic Engineering / Physics with VLSI exposure or equivalent 9 to 14 years of job experience in layout design field is preferred.
• Hands-on experience in analog layout from scratch, implementation of analog layout techniques, IR drop / EM analysis
• Deep understanding of analog circuit layout concepts in submicron CMOS technologies
• Possess strong technical, analytical & problem-solving skills in layout design
• Ability to work as strong team player and participate in cross-functional activities
• Good interpersonal, verbal and communication skill with good initiative at work