Lead the design and simulation of leadframes using CAD tools to create progressive stamping dies.
Master Geometric Dimensioning and Tolerancing (GD&T) to ensure sub‑micron precision for critical thermal components.
TMA and Electrical Parasitic modelling simulation.
Strong FEA simulation on design risk mitigation.
Process & Rules Development
Develop new design rules for leadframes based on customer requirements and the capabilities of assembly processes.
Incorporate Design for Manufacturability (DFM) and Design for Test (DFT) principles into the design.
Collaborate closely with cross‑functional teams, including manufacturing, mechanical engineers, and quality assurance.
Liaise with customers to align design requirements with their needs.
Analysis & Validation
Perform worst‑case analysis, Failure Mode and Effects Analysis (FMEA), and reliability predictions.
Ensure designs comply with performance, cost, and reliability targets.
Stay updated on the latest advancements in semiconductor packaging technologies and industry trends.
Ensure designs meet international standards and other relevant regulatory requirements.
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Engineer • Ipoh, Perak, Malaysia
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