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Senior Logic Design Verification Engineer
Intel CorporationGeorge Town, Penang, Malaysia30+ hari lalu
Penerangan pekerjaanPossess a Bachelor's, a Master's degree or a Ph.D. in Electronics Engineering, Computer Engineering, or equivalent with relevant experience in IP / SoC design or verification development. At least 8 years of relevant working experience in design verification with UVM and System Verilog. Familiarize with UVM Verification Components and Bus-functional Models (BFM) and building Testbench from ground up. Strong in UVM application eg UVM Virtual Sequencer, Factory and Formal Property will be advantage. Communicates well with good influencing skills. Strong in analysis, debugging skills, and creative in problem solving. Motivated, Self-driven and Independent. Working in Assembly language, embedded firmware, real-time operating system RTOS, BIOS, and HW / SW interactions. Working experience with ACPI spec, power management. Hardware-Firmware co-validation development and debugging environments. Familiar with Linux, industry scripting languages (Python, Perl), and simulation tools. Behavioral traits including, but not limited to, strong written and verbal communication skills, tolerance of ambiguity, problem solving, teamwork, attention to detail, commitment to task, quality focus and Knowledge of Agile. Job Type : Experienced Hire Shift : Shift 1 (Malaysia) Primary Location : Malaysia, Penang Additional Locations : Malaysia, Penang Business Group : The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. Posting Statement : All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust : N / A Work Model for this Role : This role will require an on-site presence.
Senior Logic Design Verification Engineer
2 days ago Be among the first 25 applicants
The world is transforming - and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We're inviting dynamic and imaginative technocrats to take part in creating it. The Power Management Controller IP (PMC) is responsible for managing the system boot and power for client and server chipsets.
Responsibilities
- As a member of the PMC Logic Design Verification team, you will work closely with IP architects to define and develop verification testbench and building RTL models for verification.
- You will be validating and verifying the functionality of new architectural features of next generation designs by developing testplan, tests content or test tools.
- You will be finding and implementing corrective measures for failing RTL tests, analyzes and uses results to modify testing.
- Your influence will cross-organizational boundaries with our manufacturing and validation partners.
- Your expertise will grow as you debug and resolve issues on system platforms using software and RTL simulation tools.
Qualifications
Relevant Qualifications
Job Details
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