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Lead Engineer, FPGA / CPLD

Lead Engineer, FPGA / CPLD

CelesticaPenangMalaysia, Penang, Malaysia
30+ hari lalu
Penerangan pekerjaan

Overview

Lead Engineer, FPGA / CPLD at Celestica

Responsibilities

  • Lead the design, development and implementation of technical solutions in multiple domains. Participate in project planning and scheduling. Review, interpret and may negotiate customer requirements / specifications and provide customer feedback. Lead the deployment of strategic programs and coordinate site-wide deployment efforts.
  • Proactively promote industry best practices
  • May manage relationships with key vendors / partners
  • Research systems ideas and draw up plans for these systems
  • Design, modify and implement systems that meet customer and Celestica needs. Architecture of solution : divide up tasks for various engineering teams to execute considering requirements engineering, reliability, logistics, coordination of different teams, testing and evaluation, maintainability and related disciplines
  • Test, simulate and measure (including troubleshooting) the performance of systems
  • Keep up to date with relevant industry knowledge and regulations
  • Solve complex problems
  • Liaison with suppliers, customers, contractors, and other internal teams
  • Analyze and interpret data and information
  • Recommend system modifications
  • Create reports and documentation
  • Set yearly plans and goals for the department, provide direction on expected performance, and give regular performance evaluations and ongoing feedback. Accountable for department objectives and achieving targets for KPIs
  • Ability to read / understand schematics and have a basic understanding of HW architecture and concepts such as Clock, Interrupts, DC / DC, Ripple, and Buses (SATA / SAS / PCIe / I2C / SPI)

Knowledge / Skills / Competencies

  • FPGA design processes including programming, constraints edit, functional verification, logic synthesis, floorplanning and routing, timing verification
  • Hardware description languages : VHDL, Verilog HDL, SystemVerilog
  • Development tools including Xilinx ISE, Altera Quartus
  • Simulation tools such as ModelSim SE
  • Synthesis tools such as Synplicity Synplify
  • BS / EE with 5+ years of FPGA / CPLD development experience
  • Solid Verilog RTL and test bench coding skills, good coding style
  • Familiar with at least one mainstream FPGA and development platform (Xilinx / Altera / Lattice)

    • Physical Demands

  • Duties performed in a normal office environment
  • May require extended periods of sitting and concentration on a computer monitor
  • Repetitive manual movements (data entry, mouse use, etc.)
  • Able to work on weekends or public holidays as requested
  • Occasional travel may be required

    • Typical Experience

  • Around 8 years of related experience in similar roles

    • Typical Education

    Bachelor degree in electrical or electronics engineering. Masters preferred.

    Notes

    This job description is not intended to be an exhaustive list of duties and responsibilities. Celestica is an equal opportunity employer. All qualified applicants will receive consideration for employment and will not be discriminated against on any protected status.

    Celestica is committed to fostering an inclusive, accessible environment. Special arrangements can be made for candidates who need it during the hiring process. Please indicate your needs and we will work with you to meet them.

    Company Overview

    Celestica (NYSE, TSX : CLS) enables the world’s best brands. We partner with leading companies in Aerospace and Defense, Communications, Enterprise, HealthTech, Industrial, Capital Equipment and Energy to deliver solutions for their most complex challenges. Headquartered in Toronto, Celestica has locations worldwide and provides hardware design, manufacturing and supply chain solutions to customers.

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    Lead Engineer Fpga Cpld • PenangMalaysia, Penang, Malaysia