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IC Package Design Engineer (Flip Chip / Substrate)

IC Package Design Engineer (Flip Chip / Substrate)

USTBayan Lepas, Malaysia
3 hari lalu
Penerangan pekerjaan

We are hiring Engineers! | Talent Acquisition @ UST

Role Overview We are seeking a highly skilled

Package Design Engineer

with

5–8 years of experience

in advanced IC packaging. The ideal candidate will have strong expertise in

Flip Chip

and

multi-layer substrate (8+ layers) design , with a solid understanding of substrate manufacturing and assembly rules. The role requires close collaboration with cross-functional teams and vendors to deliver high-performance, reliable, and manufacturable package solutions. Key Responsibilities Perform the design and development of

multi-layer package substrates (8+ layers)

for advanced semiconductor devices. Perform package layout, routing, and stack-up planning using

EDA tools (Mentor Graphics, Cadence Allegro, PLA) . Ensure designs comply with

substrate manufacturing rules

(trace width / spacing, via design, impedance requirements). Incorporate

assembly rules

(die placement, bump / ball pitch, solder joint reliability, warpage control) into package designs. Develop and validate

Flip Chip package designs , including bump assignment, redistribution layers (RDL), and underfill considerations. Collaborate with

Signal Integrity (SI), Power Integrity (PI), and thermal analysis teams

to ensure robust performance. Partner with

substrate vendors and OSATs

to verify design manufacturability, yield, and assembly feasibility. Provide

on-site vendor support

when required to resolve design and assembly issues. Skills & Qualifications Bachelor’s or Master’s degree in

Electrical Engineering, Electronics, Materials Science, or related field . 5–8 years of hands-on experience

in package design, with proven expertise in

multi-layer (8+) substrate design . Proficiency with

EDA tools : Mentor Graphics, Cadence Allegro, PLA. (Mentor Graphics Xpedition / Cadence Allegro Package Designer) Strong knowledge of

substrate manufacturing rules and assembly rules . Experience with

Flip Chip package design methodologies . Familiarity with

SI / PI / thermal considerations

in advanced packages. Strong

communication and collaboration skills

for cross-functional and vendor engagement. Flexibility to travel and provide

on-site vendor support

as needed. Seniority level : Mid-Senior level Employment type : Full-time Job function : IT Services and IT Consulting

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Design Engineer • Bayan Lepas, Malaysia

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