Design Verification Engineer

Talent Acquisition Specialist-ThunderSoft

About the job

We welcome candidates of any nationality to apply for this position.

Requirements

• Digital ASIC / SOC design verification. The candidate should have good understanding on ASIC / SOC design flow and should have :
• Strong coding with Verilog and SystemVerilog
• Good knowledge of design verification methodology UVM
• Many experiences with sequence creation, functional cover groups and assertion coding
• Be familiar with scripting language, such as Perl, C shell, Makefile, Ruby
• Has one or more of the following experience / knowledge
• Such as X86 / ARM / 8051 architecture, AMBA(AXI / AHB / APB) bus, USB(3.0 / 2.0 / 1.1;SSIC / HSIC / host / device / OTG) system, NAND Flash host controller / BCH / double-data-rate interface, Universal Flash Storage, PCI-E / PCI bus, low power design, clock generation and control, SD / eMMC host controller, SATA / SAS, Legacy IPs (SPI / SMBUS / ACPI / LPC / GPIO), General connectivity IPs (I2S / I2C / UART), Ethernet, JTAG, etc.
• Exhibit good verbal and written communication skills in English

Responsibilities

Seniority level

Mid-Senior level

Employment type

Full‑time

Industries

Semiconductor Manufacturing and IT Services and IT Consulting

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