Physical Design Engineer

Direct message the job poster from Infinecs Systems

Professional Recruiter at Infinecs Systems Sdn. Bhd.

Overview

Responsibilities include (but are not limited to) :

• You will be participating in the leading-edge System-On-a-Chip (SoC) design projects using cutting-edge process technology nodes for various client applications.
• Ideate, develop, and execute physical design solutions : floorplan, placement, routing, cell sizing, buffering, logic restructuring to improve timing and power.
• Participate in design / architecture reviews to track design milestones.
• Evaluate and deploy the evolving physical design methodologies to handle increasingly complex SoC / IP designs within aggressive, market-driven schedules.
• Active participation in benchmarking of library, technology parameters, and implementation strategy to enable design requirements of die size, power & speed.
• Actively work as part of a team both locally and with remote or multi-site teams.
• Assists with full chip timing constraints development, full chip Static Timing Analysis, and timing signoff for a complex, multi-clock, multi-voltage SoC.
• Analyze and incorporate advanced timing signoff flows (SSTA, LOCV Based STA, IR Drop aware STA) into SoC timing signoff flow.
• Active participation to enhance the flow from the front end (pre-layout) to the back end (post-layout) at both chip level and block level.

Key Requirements

Additional Skills

Job Details

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