Senior Staff Silicon Design Engineer

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The focus of this role is to plan, build, and execute the design of new and existing features for AMD’s IP (involving System reset and boot, clocking, advanced power management as well as some sub-IP controllers), resulting in no bugs in the final design.

It is a must that the candidate has one or more of the following experience / knowledge, such as X86 / ARM architecture, AMBA(AXI / AHB / APB) bus, USB(4.0 / 3.0 / 2.0 / 1.1; HSIC / host / device / OTG) system, NAND Flash host controller / BCH / double-data-rate interface, PCI-E / PCI bus, low power design, clock generation and control, SD / eMMC host controller, SATA / SAS, Legacy IPs (SPI / SMBUS / ACPI / eSPI / GPIO), General connectivity IPs (I2C / I3C / UART), Ethernet, JTAG, SoC IP integration, etc.

THE PERSON

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites / timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES

Understand the ASIC design / verification flow to deliver high quality IP to SoCs and meet power, area, timing, schedule bounding box, and other metrics.

The successful candidate will work with team members and apply his / her design techniques to work on different phases of complex logic design for ASIC / SOC project. The role will include working on the following tasks from time to time : specification, microarchitecture definition, top level SOC design tasks, HDL coding, simulation debugging, timing, silicon debugging, etc.

PREFERRED EXPERIENCE

• Strong RTL coding skills with Verilog / System Verilog
• Familiar with Front-End design and implementation flow
• Strong knowledge on AMBA(AXI / AHB / APB) bus
• Good experience on system IP design in complex SoC, system reset and boot, advanced power management, clocking and etc
• Low power design experience, or Network-on-chip experience is a plus
• Scripting language experience : Perl, Ruby, Makefile, shell preferred
• Strong analytical and problem-solving skills
• Excellent communication skills and experience collaborating with global projects colleague
• Fluent English communication skills(listening, speaking and writing)
• Exposure to leadership or mentorship is an asset.

ACADEMIC CREDENTIALS

Bachelors or Masters degree in computer engineering / Electrical Engineering.

LOCATION

Penang, Malaysia

APPLICATION QUESTIONS

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