We are looking for PD V- to work for IP Design Team. The candidate must be a highly motivated self-starter who will thrive in this cutting-edge technical environment. The candidate will be in IP design team to drive the physical design block convergence for the blocks that assigned to them.
Responsibilities
- Responsible for Physical Design tasks at block or subsystem level. The tasks will include Floorplanning, Synthesis, Placement, CTS, Routing, Static Timing, Physical Verification, Formal Equivalency, Power Efficiency, IR-Drop, and EM.
- Owning the entire process from SYN to PNR using Synopsys Fusion Compiler. Crafted the convergence recipe & design collateral to meet project requirement.
- Run signoff flow including PV, extraction, STA, VCLP, FEV and EMIR, analyse the violation and converge the design.
- Expected to be able to work with limited direction, have keen attention to detail, and be able to provide crisp status of progress, issues, and risks on the program to the management team.
Requirements
Minimum 7+ years of physical design experience in converging the block.Strong analytical skillset in synthesis, placement, clock, routing, STA timing analysis, EMIR & PV convergence.Self-independent in Physical Design convergence requirements, and able to deliver on time.Able to ramp fast in physical design flow & methodology.Seniority level
Mid-Senior levelEmployment type
Full-timeJob function
IndustriesIT Services and IT Consulting#J-18808-Ljbffr