SOC FCT Design Engineer - Graduate Talent (Start ASAP)

Responsibilities

Here’s what you will be doing :

• Perform static timing analysis and provide / derive interface timing constraints to partitions
• Responsible for timing closure and signoff of FPGA / SoC and Subsystem timing
• Collaborate with Frontend, DFT, and verification teams to understand design definitions and provide feedback on timing and physical challenges
• Work closely with design and architecture teams for timing convergence analysis
• Coordinate with physical design team for timing closure

Qualifications

The company is looking for :

Benefits

This job may close before the stated closing date, you are encouraged to apply as soon as possible

#J-18808-Ljbffr