Design Verification Engineer

Lattice Overview

There is energy here… energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world‑class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus we bring total commitment and a keen‑ly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast‑paced, results‑oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Responsibilities & Skills

Lattice is seeking candidates for the position of Design Verification Engineer. This is a full time position located in Penang, Malaysia.

As a Verification Eng., you will work with IP architect to understand IP features, create testbench architecture plan, work with IP designers to develop test plan, perform detailed testing of IP features and ensure coverage is met. You will need to ensure the IP is compatible with industry standard synthesis & simulator tools. You will also co‑ordinate with IP designer on IP release mechanism for testing. You are also expected to develop scripts in Python and other script language to automate the soft IP development and testing process.

Qualifications

• At least 3‑6 years Digital Design Verification Related Experience.
• Bachelor or Masters Degree in Computer Science, Computer Engineering, Electronics and Electrical Engineer.
• Skill in debugging and analyzing complex digital design.
• Experience in HDL and HVL Languages and Methodologies.
• Knowledge in ASIC / FPGA / SoC verification or development cycle.
• Knowledge in simulation tools like Cadence IES / XCELIUM, Synopsys VCS or Mentor's Questa.
• Hands‑on experience in Python, Perl or Shell Scripting, TCL and Make.
• Strong communication, analytical and documentation skills and ability to interface with other groups / site.
• Programming skills (e.g. : C / C++, Perl, TCL or Python).
• Experience in PCIE protocols.
• Experience in hardware validation and debug is a plus.

Benefits

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

About Lattice

Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 800 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit

Applications are welcome from all qualified candidates.

Feel the energy.

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